Spin qubits are maturing fast — but the defects that limit their performance remain stubbornly hard to see. Today, we’re excited to announce Q-INSPECT (Quantum INSitu Performance and Error Characterization Technology), a new project awarded under the Holland High Tech TKI HTSM MKB call. Q-INSPECT brings together Onnes Technologies’ instrumentation expertise with TNO’s applied quantum research, running from October 2026 to October 2028.
The Challenge
SiGe/SiO₂ spin-qubit devices are exquisitely sensitive to interface defects. Dielectric interface traps at this boundary drive decoherence, charge noise and device-to-device variability. This are three of the most persistent obstacles on the road to scalable spin-qubit hardware.
The trouble is that no existing tool can map these defects in situ, at the millikelvin temperatures where qubits actually operate. Today’s characterization techniques work at room temperature or rely on indirect electrical signatures. That leaves a slow, indirect feedback loop between materials development and device performance. Researchers infer what’s happening at the interface rather than imaging it directly.
What Q-INSPECT Builds
Q-INSPECT develops and validates low-temperature Kelvin Probe Force Microscopy (LT-KPFM) inside a millikelvin dilution refrigerator, applied to dielectric interface trap (DIT) characterization at the SiGe/SiO₂ interface of spin-qubit test structures.
In practical terms: for the first time, this will make it possible to image the electrostatic landscape that a spin qubit actually experiences and at the temperature it actually experiences it.
Why This Matters
Better metrology shortens the loop between materials science and device performance. Instead of inferring defect populations from electrical transport measurements, researchers will be able to directly image trap densities and locations at operating temperature, then feed that information back into materials and fabrication choices.
A faster, more direct materials-to-performance feedback loop means faster iteration and faster iteration means better qubits, sooner. Q-INSPECT is also a step toward establishing the quantitative, nanoscale metrology infrastructure that scalable quantum computing will need, and reinforces the Netherlands’ position at the frontier of quantum hardware development.
Get Involved
Q-INSPECT runs October 2026 through October 2028, led by Onnes Technologies with TNO as knowledge partner.
Curious what millikelvin SPM could do for your quantum hardware stack? Get in touch.